Laurence
031074c9a9
Bootstrap of the project (M0). Sets up the monorepo, design docs, hardware BOM, the open API contract, component skeletons, licensing and CI, following the Default Workflow SOP. What changed: - CLAUDE.md + docs/: copied the Default Workflow so sessions load the SOP. - state/: PROJECT, ARCHITECTURE, DECISIONS, TODO, NOTES filled in for OpenScribe. ARCHITECTURE captures the four-part design (firmware, server, app, case) and the three sync paths; DECISIONS records the hardware, AI-stack, storage, app and licensing choices; TODO lays out milestones M1-M9. - hardware/BOM.md: two build options (compact XIAO ESP32-S3 Sense; dev ESP32-S3 + I2S mic + SD), wiring/pinout, indicative cost. - api/openapi.yaml: the completely open API (device + server surfaces), including recording list/download/delete and exports (wav/ogg/txt/srt/vtt/md/json). - firmware/: PlatformIO ESP32-S3 project, two board profiles, pin map, boot scaffold with module seams for M1-M4. - server/: FastAPI skeleton mirroring the OpenAPI, config for self-hosted MinIO, faster-whisper and Ollama; stub routes browsable at /docs. - app/, case/: Flutter app plan; parametric OpenSCAD enclosure. - Licensing: GPL-3.0 (code), CERN-OHL-S-2.0 (hardware), CC-BY-SA-4.0 (case/docs), REUSE-style LICENSES/ with SPDX headers; LICENSING.md explains the split. - CI: Forgejo Actions workflow builds firmware (both profiles) and lints/imports server. Why: - Everything self-hosted and openly licensed per the user's requirements: an open API, three sync paths (BLE control, WiFi transfer, independent WiFi upload on charge to generic cloud storage), and a full self-hosted transcription+summary stack. Notes: - No custom PCB in v1; off-the-shelf modules. Physical verification waits on parts. - Component code is stubs at M0; features land milestone by milestone, each as its own branch/PR per the workflow. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
33 lines
No EOL
1.3 KiB
C
33 lines
No EOL
1.3 KiB
C
// SPDX-License-Identifier: GPL-3.0-only
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// OpenScribe pin map. Defaults match hardware/BOM.md (Build B, ESP32-S3 devkit).
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// Override per board via the OPENSCRIBE_BOARD_* flags set in platformio.ini.
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#pragma once
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#if defined(OPENSCRIBE_BOARD_XIAO)
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// Seeed XIAO ESP32-S3 Sense: onboard PDM mic + microSD use the Sense board's fixed pins.
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// The audio driver selects the PDM path for this board; these are placeholders for the
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// user-facing controls only.
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#define PIN_BUTTON 2 // external tactile button to GND
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#define PIN_LED 21 // XIAO onboard user LED
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#define PIN_VBUS_SENSE -1 // use USB-serial/VBUS API on XIAO
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#define PIN_CHARGE_STAT -1
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#else // OPENSCRIBE_BOARD_DEV (default)
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// I2S MEMS microphone (INMP441 / ICS-43434)
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#define PIN_I2S_BCLK 4
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#define PIN_I2S_WS 5
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#define PIN_I2S_DIN 6
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// microSD (SPI mode)
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#define PIN_SD_SCK 12
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#define PIN_SD_MOSI 11
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#define PIN_SD_MISO 13
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#define PIN_SD_CS 10
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// Controls / status
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#define PIN_BUTTON 7 // active-low, internal pull-up
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#define PIN_LED 48 // WS2812 data (or plain LED via 330R)
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#define PIN_CHARGE_STAT 14 // TP4056 STAT (open-drain)
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#define PIN_VBUS_SENSE 15 // USB 5V present -> on-charge / powered mode
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#define PIN_MOTOR 16 // optional haptic, via transistor
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#endif |